Mainak Bhattacharyya
I am curently pursuing my Ph.D. at Department of EECS, IISER Bhopal. Before PhD, I obtained my Masters in Physics from National Institute of Technology Jamshedpur, India and graduated with the institute Gold medal.
I also did some freelancing with a Ulm based quantum software startup QC Design and worked on their software Plaquette. During my PhD I received the IGSTC PhD Industrial Exposure Fellowship in 2025.
Most of my current work focuses on developing decoders for QLDPC codes and exploring fault-tolerant architectures for the ever so mind-boggling quantum computers.
Research
Some recent works
Published articles
- M. Bhattacharyya and A. Raina, 2026. Quantum approximation optimization algorithm for the trellis-based viterbi decoding of classical error-correcting codes: M. Bhattacharyya, A. Raina. Quantum Information Processing, 25(2), p.52.
Preprints
- M. Bhattacharyya and A. Raina, 2025. Decoding quantum LDPC codes using collaborative check node removal. arXiv preprint arXiv:2501.08036.
- H. Gupta, M. Bhattacharyya, R. Jain and A. Raina, 2025. Fault-tolerant syndrome extraction in [[n, 1, 3]] non-CSS code family generated using measurements on graph states. arXiv preprint arXiv:2501.12072.
Conference Proceedings
- M. Bhattacharyya and A. Raina, 2022, December. A quantum algorithm for syndrome decoding of classical error-correcting linear block codes. In 2022 IEEE/ACM 7th Symposium on Edge Computing (SEC) (pp. 456-461). IEEE.
Contact
Lab 204, Academic Building 1C
IISER Bhopal
Bhopal, 462066
Madhya Pradesh, India